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Category:
Electrical
By
K. Pagiamtzis
2 years ago
ABSTRACT
This paper presents two techniques to reduce power consumption in content-addressable memories (CAMs). The first technique is to pipeline the search operation by breaking the match-lines into several segments. Since most stored words fail to match in their first segments, the search operation is discontinued for subsequent segments, hence reducing power. The second technique is to broadcast small-swing search data on less capacitive global search-lines, and only amplify this signal to full swing on a shorter local search-line. As few match-line segments are active, few local search-lines will be enabled, again saving power. We have employed the proposed schemes in a 1024 144-bit ternary CAM in 1.8-V 0.18-¼m CMOS, illustrating an overall power reduction of 60% compared to a nonpipelined, nonhierarchical architecture. The ternary CAM achieves a 7-ns search cycle time at 2.89 fJ/bit/search.
Source
IEEE Journal of Solid-State Circuits
(2004) vol. 39 pp.1512-1519,
Kostas Pagiamtzis, Ali Sheikholeslami
Keywords
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